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v cc v cc cs out v s com in err to load v cc in features n gate drive supply range from 12 to 18v n undervoltage lockout n current detection and limiting loop to limit driven power transistor current n error lead indicates fault conditions and programs shutdown time n output in phase with input description the IR2121 is a high speed power mosfet and igbt driver with over-current limiting protection cir- cuitry. latch immune cmos technology enables rug- gedized monolithic construction. logic inputs are compatible with standard cmos or lsttl outputs. the output driver features a high pulse current buffer stage designed for minimum cross-conduction. the protection circuitry detects over-current in the driven power transistor and limits the gate drive voltage. cycle-by-cycle shutdown is programmed by an ex- ternal capacitor which directly controls the time in- terval between detection of the over-current limiting condition and latched shutdown. the output can be used to drive an n-channel power mosfet or igbt in the low side configuration. data sheet no. pd-6.018d IR2121 current limiting low side driver product summary v offset 5v max. i o +/- 1a / 2a v out 12 - 18v v csth 230 mv t on/off (typ.) 150 & 150 ns package typical connection c ontrol i ntegrated c ircuit d esigners? m anual b-91
IR2121 b-92 c ontrol i ntegrated c ircuit d esigners? m anual parameter v alue symbol definition min. max. units v cc fixed supply v oltage -0.3 25 v s gate drive return voltage v cc - 25 v cc + 0.3 v o output v oltage v s - 0.3 v cc + 0.3 v in logic input v oltage -0.3 v cc + 0.3 v err error signal voltage -0.3 v cc + 0.3 v cs current sense voltage v s - 0.3 v cc + 0.3 p d package power dissipation @ t a +25c 1.0 w r q ja thermal resistance, junction to ambient 125 c/w t j junction temperature 150 t s stor age t emperature -55 150 c t l lead temperature (soldering, 10 seconds) 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. parameter value symbol definition min. max. units v cc fixed supply voltage v s + 10 v s + 20 v s gate drive return voltage -5 5 v o output v oltage v s v cc v in logic input v oltage 0 v cc v err error signal voltage 0 v cc v cs current sense signal voltage v s v cc t a ambient temperature -40 125 c recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15v differential. v v
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-93 parameter v alue symbol definition figure min. typ. max. units t est conditions t on turn-on propagation delay 7 150 200 t off turn-off propagation delay 8 150 190 t sd err shutdown propagation delay 9 1.7 2.2 s t r turn-on rise time 10 43 60 t f turn-off fall time 11 26 35 t cs cs shutdown propagation delay 12 0.7 1.2 t err cs to err pull-up propagation delay 13 9.0 12 c err = 270 pf dynamic electrical characteristics v bias (v cc ) = 15v, c l = 3300 pf and t a = 25c unless otherwise specified. the dynamic electrical characteristics are defined in figures 2 through 5. parameter v alue symbol definition figure min. typ. max. units t est conditions v ih logic 1 input v oltage 14 2.2 v cc = 12v to 18v v il logic 0 input v oltage 15 0.8 v cc = 12v to 18v v csth+ cs input positive going threshold 16 150 230 320 v cc = 12v to 18v v csth- cs input negative going threshold 17 130 200 260 v cc = 12v to 18v v oh high level output voltage, v bias - v o 18 100 i o = 0a v ol low level output voltage, v o 19 100 i o = 0a i qcc quiescent v cc supply current 20 1.1 2.2 ma v in = v cs = 0v or 5v i in+ logic 1 input bias current 21 4.5 10 v in = 5v i in- logic 0 input bias current 22 1.0 v in = 0v i cs+ high cs bias current 23 4.5 10 v cs = 3v or 5v i cs- low cs bias current 24 1.0 v cs = 0v v ccuv+ v cc supply undervoltage positive going 25 8.3 8.9 9.6 threshold v ccuv- v cc supply undervoltage negative going 26 7.3 8.0 8.7 threshold i err err timing charge current 27 65 100 130 v in = 5v, v cs = 3v err < v err+ i err+ err pull-up current 28 8.0 15 v in = 5v, v cs = 3v err > v err+ i err- err pull-down current 29 16 30 v in = 0v i o+ output high short circuit pulsed current 30 1.0 1.6 v o = 0v, v in = 5v pw 10 s i o- output low short circuit pulsed current 31 2.0 3.3 v o = 15v, v in = 0v pw 10 s static electrical characteristics v bias (v cc ) = 15v and t a = 25c unless otherwise specified. the v in , v th and i in parameters are referenced to com. the v o and i o parameters are referenced to v s . ns ns s v a ma a v a mv
IR2121 b-94 c ontrol i ntegrated c ircuit d esigners? m anual v cc in err com 1.8v uv detect error timing pre driver 500 ns blank v cc out v s cs 1.8v amplifer - + 0.23v buffer comparator lead definitions lead symbol description v cc logic and gate drive supply in logic input for gate driver output (out), in phase with out err serves multiple functions; status reporting, linear mode timing and cycle by cycle logic shutdown com logic ground out gate drive output v s gate drive supply return cs current sense input to current sense comparator functional block diagram 8 lead dip IR2121 part number lead assignments
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-95 thickness of gate oxide 800 ? connections material poly silicon first width 4 m layer spacing 6 m thickness 5000? material al - si (si: 1.0% 0.1%) second width 6 m layer spacing 9 m thickness 20,000? contact hole dimension 8 m x 8 m insulation layer material psg (sio 2 ) thickness 1.5 m passivation material psg (sio 2 ) (1) thickness 1.5 m passivation material proprietary* (2) thickness proprietary* method of saw full cut method of die bond ablebond 84 - 1 wire bond method thermo sonic material au (1.0 mil / 1.3 mil) leadframe material cu die area ag lead plating pb : sn (37 : 63) package types 8 lead pdip materials eme6300 / mp150 / mp190 remarks: * patent pending device information process & design rule hvdcmos 4.0 m transistor count 410 die size 104 x 111 x 26 (mil) die outline
IR2121 b-96 c ontrol i ntegrated c ircuit d esigners? m anual err cs in out figure 3. switc hing time wavef orm definitions figure 4. err shutdown waveform definitions figure 1. input/output timing diagram figure 2. switc hing time test circuit figure 5. cs shutdown waveform definitions figure 6. cs to err waveform definitions 4 IR2121 v cc out in t r t on t f t off out 50% 50% 90% 90% 10% 10% cs t cs out 50% 90% cs t cs ho 50% 90% cs t err err 50% 50% 1.8v dt dt c dv i c 1.8v 100 ua err = =
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-97 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) err to output shutdown delay time ( s) max. typ. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) t urn-off delay time (n s) max. typ. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) t urn-on delay time (n s) max. typ. figure 8a. turn-off time vs. temperature figure 8b. turn-off time vs. v oltage figure 7a. turn-on time vs. temperature figure 7b. turn-on time vs. v oltage figure 9b. err to output shutdown vs. v oltage figure 9a. err to output shutdown vs. temperature 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) t urn-on time (n s) max. typ. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) t urn-off time (ns ) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bias supply voltage (v) err to output shutdown delay time ( s) max. typ.
IR2121 b-98 c ontrol i ntegrated c ircuit d esigners? m anual 0.00 0.40 0.80 1.20 1.60 2.00 -50 -25 0 25 50 75 100 125 temperature (c) c s to output shutdown delay time ( s) max. typ. 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) t urn-on rise time (n s) max. typ. figure 11a. turn-off f all time vs. temperature figure 11b. turn-off f all time vs. v oltage figure 10a. turn-on rise time vs. temperature figure 10b. turn-on rise time vs. v oltage figure 12a. cs to output shutdown vs. temperature figure 12b. cs to output shutdown vs. v oltage 0 20 40 60 80 100 10 12 14 16 18 20 v bias supply voltage (v) turn-on rise time (n s) max. typ. 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) t urn-off fall time (ns ) max. typ. 0 20 40 60 80 100 10 12 14 16 18 20 v bias supply voltage (v) t urn-off fall time (ns ) max. typ. 0.00 0.40 0.80 1.20 1.60 2.00 10 12 14 16 18 20 v bias supply voltage (v) c s to output shutdown delay time ( s) max. typ.
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-99 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) l ogic "1" input threshold (v ) min. figure 14a. logic 1 input threshold vs. temperature figure 14b. logic 1 input threshold vs. voltage figure 13b. cs to err pull-up vs. v oltage figure 13a. cs to err pull-up vs. temperature figure 15a. logic 0 input threshold vs. temperature figure 15b. logic 0 input threshold vs. voltage 0.0 4.0 8.0 12.0 16.0 20.0 10 12 14 16 18 20 v bias supply voltage (v) cs to err pull-up delay time ( s) max. typ. 0.0 4.0 8.0 12.0 16.0 20.0 -50 -25 0 25 50 75 100 125 temperature (c) cs to err pull-up delay time ( s) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc logic supply voltage (v) l ogic "1" input threshold (v ) min. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc logic supply voltage (v) l ogic "0" input threshold (v ) max. 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) l ogic "0" input threshold (v ) max.
IR2121 b-100 c ontrol i ntegrated c ircuit d esigners? m anual 0.00 0.20 0.40 0.60 0.80 1.00 -50 -25 0 25 50 75 100 125 temperature (c) h igh level output voltage (v ) max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) c s input positive going threshold (mv ) min. typ. max. figure 17a. cs input threshold (-) vs. temperature figure 17b. cs input threshold (-) vs. v oltage figure 16a. cs input threshold (+) vs. temperature figure 16b. cs input threshold (+) vs. v oltage figure 18a. high level output vs. temperature figure 18b. high level output vs. voltage 0 100 200 300 400 500 10 12 14 16 18 20 v bs floating supply voltage (v) c s input positive going threshold (mv ) min. typ. max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) c s input negative going threshold (mv ) max. typ. min. 0 100 200 300 400 500 10 12 14 16 18 20 v bs floating supply voltage (v) c s input negative going threshold (mv ) min. typ. max. 0.00 0.20 0.40 0.60 0.80 1.00 10 12 14 16 18 20 v bs floating supply voltage (v) h igh level output voltage (v ) max.
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-101 0.00 0.20 0.40 0.60 0.80 1.00 -50 -25 0 25 50 75 100 125 temperature (c) l ow level output voltage (v ) max. figure 19a. low level output vs. temperature figure 19b. low level output vs. voltage 0.00 0.20 0.40 0.60 0.80 1.00 10 12 14 16 18 20 v bs floating supply voltage (v) l ow level output voltage (v ) max. figure 21a. logic 1 input current vs. temperature figure 21b. logic 1 input current vs. voltage figure 20a. v cc supply current vs. temperature figure 20b. v cc supply current vs. v oltage 0 5 10 15 20 25 -50 -25 0 25 50 75 100 125 temperature (c) logic "1" input bias current (a ) max. typ. 0 5 10 15 20 25 10 12 14 16 18 20 v cc logic supply voltage (v) logic "1" input bias current (a ) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) v cc supply current (ma ) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc supply voltage (v) v cc supply current (ma ) max. typ.
IR2121 b-102 c ontrol i ntegrated c ircuit d esigners? m anual figure 22a. logic 0 input current vs. temperature figure 22b. logic 0 input current vs. voltage 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) logic "0" input bias current (a ) max. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc logic supply voltage (v) logic "0" input bias current (a ) max. figure 24a. low cs bias current vs. temperature figure 24b. low cs bias current vs. voltage figure 23a. high cs bias current vs. temperature figure 23b. high cs bias current vs. v oltage 0.0 5.0 10.0 15.0 20.0 25.0 10 12 14 16 18 20 v bs floating supply voltage (v) " high" cs bias current (a ) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bs floating supply voltage (v) " low" cs bias current (a ) max. 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) " low" cs bias current (a ) max. 0.0 5.0 10.0 15.0 20.0 25.0 -50 -25 0 25 50 75 100 125 temperature (c) " high" cs bias current (a ) max. typ.
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-103 figure 27a. err timing charge current vs. temperature figure 27b. err timing charge current vs. voltage figure 25. v cc undervoltage (+) vs. temperature figure 26. v cc undervoltage (-) vs. temperature figure 28a. err pull-up current vs. temperature figure 28b. err pull-up current vs. v oltage 0 50 100 150 200 250 10 12 14 16 18 20 v cc logic supply voltage (v) err timing charge current (a ) min. typ. max. 0.0 5.0 10.0 15.0 20.0 25.0 -50 -25 0 25 50 75 100 125 temperature (c) err pull-up current (a ) typ. min. 0.0 5.0 10.0 15.0 20.0 25.0 10 12 14 16 18 20 v cc logic supply voltage (v) err pull-up current (a ) min. typ. 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v cc undervoltage lockout + (v ) max. typ. min. 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v cc undervoltage lockout - (v ) max. typ. min. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature (c) err timing charge current (a ) max. typ. min.
IR2121 b-104 c ontrol i ntegrated c ircuit d esigners? m anual 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) o utput sink current (a ) typ. min. 0.00 0.50 1.00 1.50 2.00 2.50 -50 -25 0 25 50 75 100 125 temperature (c) o utput source current (a ) typ. min. 0 10 20 30 40 50 -50 -25 0 25 50 75 100 125 temperature (c) e rr pull-down current (a ) typ. min. figure 30a. output source current vs.temperature figure 30b. output source current vs. v oltage figure 29a. err pull-down current vs.temperature figure 29b. err pull-down current vs. v oltage figure 31a. output sink current vs.temperature figure 31b. output sink current vs. v oltage 0 10 20 30 40 50 10 12 14 16 18 20 v cc logic supply voltage (v) e rr pull-down current (a ) max. typ. 0.00 0.50 1.00 1.50 2.00 2.50 10 12 14 16 18 20 v bs floating supply voltage (v) o utput source current (a ) min. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bs floating supply voltage (v) o utput sink current (a ) min. typ.
IR2121 c ontrol i ntegrated c ircuit d esigners? m anual b-105 figure 32a. turn-on time vs. input temperature figure 32b. turn-off time vs. input v oltage figure 33. maximum v s negative offset vs. supply vo l t ag e 0 100 200 300 400 500 5 7.5 10 12.5 15 input voltage (v) t urn-on time (n s) typ. v cc = 15v 0 100 200 300 400 500 5 7.5 10 12.5 15 input voltage (v) t urn-off time (ns ) typ. v cc = 15v -15.00 -12.00 -9.00 -6.00 -3.00 0.00 10 12 14 16 18 20 v bs floating supply voltage (v) v s offset supply voltage (v ) typ. typ.

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